Originally Posted by Schoenfeld
Address is not a problem, as the address bus is valid a full cycle before /AS (during /ECS), so there is plenty of time for all lines to settle, and for logic to trickle to a stable state before /AS triggers.
1K pulldown on the data lines is a little more challenging, but the LCX16245 drivers that I'm using are strong enough to drive the load - just not really fast due to the high capacitive load with FPU and all the RAMs unbuffered on the bus. My prototype has some trouble doing a -1-1-1 burst, but since the first access works fine, I can always revert to a -2-2-2 burst. I'd like to try fiddling with shifting clocks first, and only if that's not successful, I'll slow down.
The 30MHz limit is only given if you use the 2M or 4M on the 2630. If you can live without that, it should be safe to clock a lot higher. Haven't checked the 68000-access state machine yet, so I don't know if that gives a limit. Did you ever try running at higher speeds without local memory? I know it doesn't make sense without a mem expansion and it will only work properly without DMA devices.
Actually the address bus is valid 1/2 cycle before /AS. On the A2630 /AS is delayed by current limiting and pull up resistors so the address is probably valid for 2/3 cycle before the logic sees /AS. Another bug which needs to be fixed to support much higher clock speeds.
I already have the 68000 state machine running at much higher clock speeds with 4MB local fast memory. Did you see the link in post #17 ?