Originally Posted by Cylon
Once you call a test result "Dhrystone" or "MIPS" you certainly have to stick to some algorithmic rules, otherwise it would just return "bogusmips" or whatever.
Yes, but a CPU that can execute 2 instructions per clock cycle is not measured fairly if the MIPS are for code running on only one pipeline.
Theoretically, a 50MHz 060 could have 100MIPS if we toy with the idea that every instruction can be executed in one cycle. But only if both pipelines are fully fed.
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