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Old 22 October 2015, 14:49   #463
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Join Date: Jun 2015
Location: Germany
Posts: 406
Originally Posted by Schoenfeld View Post
- the Vampire 600 demo that was presented was written specifically without instructions not implemented or not working correctly. Gunnar confirmed that a few posts later. I was wrong about the RISC assumption, but I was right about it not being 68k yet.
So 68040 and 68060 aren't 68k in your opinion as they do not offer hardware support for all 020 and 882 instructions, too? In the Apollo core there are still a few instructions lacking hardware support such as bitfield instructions that are very rarely used. This support will be added, though. There already is hardware support for some instructions that did not have hardware support on the 040/060.

The Apollo core has transparent caches so even borked self-modifying 68000 code will run fine. Design goal is to have hardware support for all 68k instructions from 68000 to 68060. Apollo will be more compatible than any 68k before.

The Vampire 600 FPGA is way too small for a full implementation of what Gunnar was suggesting
Vampire v2 will have a 40k LE Cyclone III that has more than enough space for 68060+ cpu power. The Vampire v1 has too small an FPGA for full hardware 020 compatibility.

Gunnar specifically avoided answering critical questions, giving more reason to believe that it's more like "I have an idea, let's try it", rather than careful planning and execution of an extremely complex job (see post#44 of that thread)
It's an extremely complex job. But a job they have done before.

What Gunnar presented lately is impressive. However, to make this a product (which is what many people want), it's still a LONG way to go.
We'll see how long "LONG" will really be.
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