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Old 16 October 2015, 21:15   #16
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Originally Posted by Schoenfeld View Post
The P1022 is a dual-core CPU. Even if you were to emulate all FPU commands in software, you'd have a spare core to do that, as OS4 is still a single-core OS.
Even if the 2nd core could be set to trap for the 1st core, wouldn't the registers still be from the 2nd core? I would expect overhead even if the cache is shared between cores. The 1st core would have to wait until the 2nd core is done before continuing.

Originally Posted by Schoenfeld View Post
Besides, it's not all-incompatible, but throws a few illegal instruction traps on commands not implemented (according to one of the developers I talked to last saturday). That's about the same as what the 060 CPU does for unimplemented commands of the earlier members of the 68k group. Would you make fun of those who designed with the 060 back then? Surely not.
My limited understanding of the P1022 is that there are no FPU registers (GPR registers are used for floating point) so *all* PPC FPU instructions must be trapped. This in contrast to the 68060 where the most common 6888x instructions are executed in hardware like FMOVE(M), FADD, FSUB, FMUL, FDIV, FSQRT, FNEG, FTST, FCMP, FABS, FINT and FINTRZ. These are the core FPU instructions in hardware vs *no* FPU instructions in hardware.

Originally Posted by wawa View Post
one person? i could count at least three attempts, an a3/4k coldfire cpu card design. the elbox approach (being demoed working, but not giving a desirable boost?) and the natami team. natami team has been given development boards by gensi, even though gunnar has been warned on a1k, him being still coldfire concept supporter. im not sure what they have tried or not, but they have given up. for good reason i guess. i would hate to see another block of incompatible binaries appearing on aminet, even if the system had been patched to boot on cf.
There were multiple attempts to execute 68k code on the ColdFire as you say. Executing 68k code on the ColdFire is even worse, IMO, than trapping all PPC FPU instructions on the P1022 because:

1) integer instructions are more common than FPU instructions
2) ColdFire has a few conflicting encodings, instructions which set the CCR differently and the stack uses different alignment which is incompatible

ColdFire requires pre-execution or on the fly patching of 68k executables. It looks like P1022 trapping of the standard PPC FPU instructions is straight forward but has much more overhead than trapping unimplemented 6888x instructions on the 68060. The P1022 FPU emulation would likely be adequate for light floating point use and a joke for heavy floating point use like using Blender.

Last edited by matthey; 16 October 2015 at 21:28.
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