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Old 03 July 2015, 08:21   #27
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Join Date: Jul 2003
Location: Helsinki / Finland
Age: 37
Posts: 6,359
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Originally Posted by Staringlizard View Post
It seems you are correct, I found some bug in the Verilog code that will make even progressive output display as interlaced

Thank for your input, I will see what I can do. I think I will release another video where I demonstrate horizontal movement as well as vertical.

Cool stuff, hope you get it running. I'm definitely following your project with interest. :-)
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