Sorry, just saw this thread.
The FPGAArcade website has been in need of some attention for a while. It's undergoing a rewrite, and we started to sync the developer repository to a public mirror.
A few points :
1 - I never suggested the MIST code was in any way based on my implementation.
2 - I am still using the T68K CPU (with my own cache) and contribute any bug fixes back. I am working on my own CPU which is smaller and faster, but that will need to wait until things are stable.
3 - The code was always going to be released, and has always been available to interested parties. I started a lot of this FPGA open source stuff, it's not going to change now!
4- The main effort was coming up with a clean framework I can use for all the cores. There is a lot of stuff in Minimig which needed improvement. It has got a lot better since I looked at it however. I mostly work in VHDL, so when I rewrite stuff it ends up in VHDL.
90% of my Amiga code is in VHDL now.
5 - um, that's about it. I'm tidying up for release now, shipping boards and fixing up the website. I want to finish the cache optimizations, but the timing is somewhat tricky. Currently the complete design is timing clean (I am an ASIC designer by trade) and the system is hence extremely stable.
p.s. any questions, just email or ask on my forum.