Originally Posted by alexh
FPGA Arcade AGA core
Written by Jakub Bednarski (Yaqube) who took over MiniMig core development and probably some input from MikeJ. AFAIK it is legally required to be open source as binaries including MiniMig GPL code have been released but so far I've seen no HDL.
That might be true if that were correct. Mike has created all new chipset VHDL code. Paula, Agnus, Denise, Alice, Lisa, Gale, etc. are all completely new from scratch. Mike has stated that he will at some point release the code to the public, but at the moment it is all new and it is his.
The Paula emulation has support for flux level input, so it supports SuperCard Pro flux images (much like WinUAE does now) which means we could attach a real floppy drive to the Replay board and use it... we just need the interface, which is something that I am looking at making.
Mike also has worked out the 68020+ instruction set emulation, so now I have 57MB of FAST RAM (and 2MB of CHIP RAM) on my Amiga Workbench. There are still some AGA and blitter quirks to resolve, but DPaint V in AGA mode works perfectly except in extended HAM mode and most games play perfectly. Some games require that you slow the CPU down to a A500 - but so is the case with real Amiga hardware.
Mike is busy getting the data/instruction cache timing issues resolved, which will boost the already very fast core to be ridiculously fast.
The hard drive speed of the Amiga core is about as fast as the SD card will handle. I see around 1.8MB per second on every test program. Adding a cache program like Power Cache makes it like everything is coming out of the RAM disk.
There is preliminary RTG support. I have the driver assembled for Mike, and testing shows that the core part is working. Video handling needs to be added.