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Forum: Coders. Asm / Hardware 10 November 2018, 15:32
Replies: 796
Views: 27,059
Posted By Kalms
Yes - however, you get the full convenience in...

Yes - however, you get the full convenience in 8088 up to only 64kB to data. As you go above 64kB (not all data fits into a single 64kB data segment) it gradually gets more and more complicated....
Forum: Coders. Asm / Hardware 10 November 2018, 13:28
Replies: 796
Views: 27,059
Posted By Kalms
You are correct in that 68000 does not support...

You are correct in that 68000 does not support table[offset1+offset2] in a PC-relative manner. 8088 does support that operation out of the box.

There is one particular situation where I have found...
Forum: Coders. Asm / Hardware 03 November 2018, 23:29
Replies: 796
Views: 27,059
Posted By Kalms
I disagree with your analysis. Relocatable...

I disagree with your analysis.

Relocatable code on 68k, where the addressing is within a 32kB memory area, is typically the same size, or smaller than, non-relocatable code. Where you would...
Forum: Coders. Asm / Hardware 03 November 2018, 21:55
Replies: 796
Views: 27,059
Posted By Kalms
I can't agree, this feature of DOS relies very...

I can't agree, this feature of DOS relies very hard on the segment registers which are the part of ISA giving some superiority to 8086. I can also mention CP/M-86, MP/M-86, ...[/QUOTE]


68k have...
Forum: Coders. Asm / Hardware 21 October 2018, 23:50
Replies: 796
Views: 27,059
Posted By Kalms
My experience from developing for 8088-80286 is...

My experience from developing for 8088-80286 is that for smaller programs - that is, programs that fit into a single 64kB segment, and where data would fit into a few 64kB segments - such that each...
Forum: Coders. Asm / Hardware 05 October 2018, 09:45
Replies: 6
Views: 575
Posted By Kalms
If you want 100% bit-precise results, and both...

If you want 100% bit-precise results, and both input operands are randomly distributed 32-bit values, then I don't think there is much you can do.

I believe that the CPUs that offer MULHIGH...
Forum: Coders. Asm / Hardware 24 September 2018, 09:09
Replies: 44
Views: 2,972
Posted By Kalms
I'm not going to spend more time on this myself,...

I'm not going to spend more time on this myself, but from what I can see so far the two main challenges will probably be 1. memory consumption for the precomputed masks (with too few masks, the...
Forum: Coders. Asm / Hardware 23 September 2018, 18:35
Replies: 44
Views: 2,972
Posted By Kalms
Alright, that makes your idea a lot more...

Alright, that makes your idea a lot more concrete, thanks.

Here are some more things for you to consider when you refine this:

- How many mask patterns do you need? Is there a trade off...
Forum: Coders. Asm / Hardware 23 September 2018, 18:07
Replies: 44
Views: 2,972
Posted By Kalms
Okay. When the CPU "prepares" a chunk, do you...

Okay. When the CPU "prepares" a chunk, do you intend that the CPU draws the mask pattern into a buffer? Effectively drawing the left- and right- edges of a 16-pixels-high segment of a triangle into a...
Forum: Coders. Asm / Hardware 23 September 2018, 16:56
Replies: 44
Views: 2,972
Posted By Kalms
Out of curiosity, what performance would you...

Out of curiosity, what performance would you estimate that this gives you?
Forum: Coders. Asm / Hardware 07 May 2018, 09:45
Replies: 6
Views: 643
Posted By Kalms
Almost. You need to handle the implicit leading...

Almost. You need to handle the implicit leading 1-bit for the mantissa. The exponent for the remaining value may then become smaller than (original exponent - 53). Extreme example: what if the lowest...
Forum: Coders. Asm / Hardware 06 May 2018, 17:12
Replies: 6
Views: 643
Posted By Kalms
Convert the original value to 96-bit...

Convert the original value to 96-bit floating-point binary representation (for example, by assembling an FMOVE.X #IMM, FPn instruction). Extract the exponent and mantissa values separately. Split the...
Forum: Coders. Asm / Hardware 01 May 2018, 12:30
Replies: 17
Views: 982
Posted By Kalms
A more problematic aspect than the blitter...

A more problematic aspect than the blitter intercepting the CPU is the CPU intercepting the blitter.

The blitter will fetch from its source channels, then the data is in transit within the blitter...
Forum: Coders. Asm / Hardware 26 April 2018, 11:45
Replies: 140
Views: 14,626
Posted By Kalms
Yep, exactly. Also, a naive flood fill...

Yep, exactly.

Also, a naive flood fill approach (combined with "only process the 2 relevant sides of a block") will not necessarily result in a strict front-to-back ordering.

Getting strict...
Forum: Coders. Asm / Hardware 25 April 2018, 10:29
Replies: 140
Views: 14,626
Posted By Kalms
Agreed with @britelite. There are lots of choices...

Agreed with @britelite. There are lots of choices left in the details when saying "use quads".


Slightly different topic; if there is a desire to reduce the CPU time spent for raycasting, then...
Forum: Coders. Asm / Hardware 24 April 2018, 12:15
Replies: 21
Views: 2,173
Posted By Kalms
oh, duh. Yeah, I was referring to that first...

oh, duh. Yeah, I was referring to that first part. Never realized that it was 102 based :)
Forum: Coders. Asm / Hardware 24 April 2018, 10:46
Replies: 21
Views: 2,173
Posted By Kalms
That depends on what blitter logic you choose to...

That depends on what blitter logic you choose to use.

My suggestion: Before you try to use a CPU/blitter combination, try making a CPU version of an effect - any effect - and in-line the C2P...
Forum: Coders. Asm / Hardware 24 April 2018, 10:20
Replies: 21
Views: 2,173
Posted By Kalms
The major problem with doing it entirely with the...

The major problem with doing it entirely with the blitter is that it caps your max framerate.

For example, if you have a normal chunky-pixel format as input, with 1 byte per pixel, and you want to...
Forum: Coders. Asm / Hardware 23 April 2018, 14:40
Replies: 21
Views: 2,173
Posted By Kalms
When I saw this Amiga demo from 1994...

When I saw this Amiga demo from 1994 (https://youtu.be/MWT4Lk2niEM?t=34) I thought "huh, smart use of a wolfenstein/doom style wall renderer". Not only do they render quicker by drawing horizontally,...
Forum: Coders. Asm / Hardware 04 April 2018, 11:58
Replies: 21
Views: 1,315
Posted By Kalms
Example implementation (wonky bit ordering, but...

Example implementation (wonky bit ordering, but works): https://github.com/Kalmalyzer/bitstreamdecoder-68k
Forum: Coders. Asm / Hardware 27 March 2018, 23:10
Replies: 21
Views: 1,315
Posted By Kalms
Sometimes it helps to split the code into two...

Sometimes it helps to split the code into two phases: first bitstream decoding, into byte- or Word-streams, and then a second phase which reads those byte-or-Word-streams and does the actual...
Forum: Coders. Asm / Hardware 20 March 2018, 16:25
Replies: 2
Views: 393
Posted By Kalms
Sounds plausible, thanks. I will probably both...

Sounds plausible, thanks. I will probably both add BBUSY tests to my BLIT handler and disable CIA interrupts (via CRA/CRB/ICR) to be safe.
Forum: Coders. Asm / Hardware 19 March 2018, 23:03
Replies: 2
Views: 393
Posted By Kalms
Emulated A500 with Kick 1.3 generates spurious Lev6 interrupt

Hi,

I was looking into a graphical corruption the other day, and ended up at "it seems that the OS is touching blitter-related bits when it shouldn't". Perhaps someone here can shed some light?
...
Forum: Coders. Asm / Hardware 15 March 2018, 13:33
Replies: 21
Views: 2,173
Posted By Kalms
If the rotation happens before c2p, it will work...

If the rotation happens before c2p, it will work on chunky pixels. If the rotation happens afterward, it will work on individual bitplanes. If the rotation happens as part of the c2p, it... makes the...
Forum: Coders. Asm / Hardware 13 March 2018, 23:42
Replies: 21
Views: 2,173
Posted By Kalms
There is a short blurb on it at the bottom of...

There is a short blurb on it at the bottom of http://www.lysator.liu.se/~mikaelk/doc/c2ptut/ .

The gist of it is:

1. You can construct a "merge op" which exchanges bits 'diagonally' between a...
Forum: Coders. Asm / Hardware 08 March 2018, 09:14
Replies: 6
Views: 693
Posted By Kalms
It may be possible to do the 90 degree rotation...

It may be possible to do the 90 degree rotation in a separate pass, before the actual c2p conversion. If you make two versions of the game - one which draws the graphics vertically, and one which...
Forum: Coders. Asm / Hardware 07 March 2018, 23:33
Replies: 6
Views: 693
Posted By Kalms
I don't know of one myself, but, what are you...

I don't know of one myself, but, what are you going to use it for, if you did come across one? What's the purpose of the 90-degree rotation?
Forum: Coders. Asm / Hardware 14 January 2018, 15:09
Replies: 140
Views: 14,626
Posted By Kalms
@master484 How about you make proof-of-concepts...

@master484 How about you make proof-of-concepts of your ideas? If it is just a question of "what will the end result look like" and not "how quick will it run on the a500" then you don't need to...
Forum: Coders. Asm / Hardware 06 January 2018, 14:44
Replies: 140
Views: 14,626
Posted By Kalms
Hm, I realized a mistake: pixel pairs will...

Hm, I realized a mistake: pixel pairs will alternate between [texel(x,y) and texel(x,y)] and [texel(x,y) and texel(x,y+1)] when magnifying. When minifying in the scale range 0.5 ... 1.0 then the...
Forum: Coders. Asm / Hardware 06 January 2018, 10:48
Replies: 140
Views: 14,626
Posted By Kalms
After some sleep, I realized that there's no...

After some sleep, I realized that there's no benefit to scrambling pixel order. Just having one texture with data %a3a2a1a0a3a2a1a0 and another with %a3a2a1a0A3A2A1A0 (so one pixel in the high nibble...
Forum: Coders. Asm / Hardware 05 January 2018, 23:00
Replies: 140
Views: 14,626
Posted By Kalms
Neat! I like your testcase definition. I...

Neat! I like your testcase definition.

I presume you are targetting A500. If so, a couple of things:

Use mipmapping. By using mipmapping you can keep a lid on the worst-case minification that...
Forum: Coders. Asm / Hardware 01 December 2017, 14:09
Replies: 32
Views: 1,965
Posted By Kalms
Side note, I implemented a thread switcher with...

Side note, I implemented a thread switcher with the intent of supporting a small number of parallel threads ("track loading from disc", "MFM decoding", "decompression", "realtime graphics") and push...
Forum: Coders. Asm / Hardware 27 November 2017, 18:22
Replies: 32
Views: 1,965
Posted By Kalms
You also need to change the IPL bits in SR. It's...

You also need to change the IPL bits in SR. It's very fiddly, most other solutions (like moving heavy processing out of the VERTB handler) are better choices.
Forum: Coders. Asm / Hardware 17 September 2017, 15:14
Replies: 7
Views: 637
Posted By Kalms
http://eab.abime.net/showthread.php?t=72575...

http://eab.abime.net/showthread.php?t=72575 contains more in-depth discussion of chipbus activity and prioritization.
Forum: Coders. Asm / Hardware 24 August 2017, 17:53
Replies: 20
Views: 1,569
Posted By Kalms
As others have mentioned, the measurement error...

As others have mentioned, the measurement error will be large if you take single instructions. If you want less than 10% error margin then I think you will need to measure blocks that take 100+...
Forum: Coders. Asm / Hardware 24 August 2017, 14:48
Replies: 20
Views: 1,569
Posted By Kalms
You can use VHPOSR as a high-precision timer...

You can use VHPOSR as a high-precision timer source on all Amiga systems. You need to make sure that the resolution is set to something such that you know how the hardware will count (DBLPAL will...
Forum: Coders. Asm / Hardware 19 July 2017, 14:39
Replies: 172
Views: 18,933
Posted By Kalms
Thanks, appreciated. Agreed that there are things...

Thanks, appreciated. Agreed that there are things that could be done to improve performance over what Ray/TSCC built back in 2008.

However, I've checked out the video, read the last 4 pages of the...
Forum: Coders. Asm / Hardware 19 July 2017, 11:16
Replies: 172
Views: 18,933
Posted By Kalms
Do you have any links to this? I'd like to read...

Do you have any links to this? I'd like to read more about it.
Forum: Coders. Asm / Hardware 17 July 2017, 23:48
Replies: 6
Views: 617
Posted By Kalms
Let's say that you start out in user mode. In...

Let's say that you start out in user mode. In this mode, a7 will alias onto the user stack pointer register (USP), and the supervisor stack pointer register (SSP) is inaccessible to you.

You can...
Forum: Coders. Asm / Hardware 09 July 2017, 22:30
Replies: 7
Views: 717
Posted By Kalms
That is indeed wrong. That is correct....

That is indeed wrong.



That is correct. (But even if instructions are being fetched from the instruction cache, these instructions will probably perform some data reads/writes -- and all those...
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