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Forum: Coders. Asm / Hardware 07 May 2018, 08:45
Replies: 6
Views: 566
Posted By Kalms
Almost. You need to handle the implicit leading...

Almost. You need to handle the implicit leading 1-bit for the mantissa. The exponent for the remaining value may then become smaller than (original exponent - 53). Extreme example: what if the lowest...
Forum: Coders. Asm / Hardware 06 May 2018, 16:12
Replies: 6
Views: 566
Posted By Kalms
Convert the original value to 96-bit...

Convert the original value to 96-bit floating-point binary representation (for example, by assembling an FMOVE.X #IMM, FPn instruction). Extract the exponent and mantissa values separately. Split the...
Forum: Coders. Asm / Hardware 01 May 2018, 11:30
Replies: 17
Views: 898
Posted By Kalms
A more problematic aspect than the blitter...

A more problematic aspect than the blitter intercepting the CPU is the CPU intercepting the blitter.

The blitter will fetch from its source channels, then the data is in transit within the blitter...
Forum: Coders. Asm / Hardware 26 April 2018, 10:45
Replies: 137
Views: 12,571
Posted By Kalms
Yep, exactly. Also, a naive flood fill...

Yep, exactly.

Also, a naive flood fill approach (combined with "only process the 2 relevant sides of a block") will not necessarily result in a strict front-to-back ordering.

Getting strict...
Forum: Coders. Asm / Hardware 25 April 2018, 09:29
Replies: 137
Views: 12,571
Posted By Kalms
Agreed with @britelite. There are lots of choices...

Agreed with @britelite. There are lots of choices left in the details when saying "use quads".


Slightly different topic; if there is a desire to reduce the CPU time spent for raycasting, then...
Forum: Coders. Asm / Hardware 24 April 2018, 11:15
Replies: 21
Views: 2,018
Posted By Kalms
oh, duh. Yeah, I was referring to that first...

oh, duh. Yeah, I was referring to that first part. Never realized that it was 102 based :)
Forum: Coders. Asm / Hardware 24 April 2018, 09:46
Replies: 21
Views: 2,018
Posted By Kalms
That depends on what blitter logic you choose to...

That depends on what blitter logic you choose to use.

My suggestion: Before you try to use a CPU/blitter combination, try making a CPU version of an effect - any effect - and in-line the C2P...
Forum: Coders. Asm / Hardware 24 April 2018, 09:20
Replies: 21
Views: 2,018
Posted By Kalms
The major problem with doing it entirely with the...

The major problem with doing it entirely with the blitter is that it caps your max framerate.

For example, if you have a normal chunky-pixel format as input, with 1 byte per pixel, and you want to...
Forum: Coders. Asm / Hardware 23 April 2018, 13:40
Replies: 21
Views: 2,018
Posted By Kalms
When I saw this Amiga demo from 1994...

When I saw this Amiga demo from 1994 (https://youtu.be/MWT4Lk2niEM?t=34) I thought "huh, smart use of a wolfenstein/doom style wall renderer". Not only do they render quicker by drawing horizontally,...
Forum: Coders. Asm / Hardware 04 April 2018, 10:58
Replies: 21
Views: 1,246
Posted By Kalms
Example implementation (wonky bit ordering, but...

Example implementation (wonky bit ordering, but works): https://github.com/Kalmalyzer/bitstreamdecoder-68k
Forum: Coders. Asm / Hardware 27 March 2018, 22:10
Replies: 21
Views: 1,246
Posted By Kalms
Sometimes it helps to split the code into two...

Sometimes it helps to split the code into two phases: first bitstream decoding, into byte- or Word-streams, and then a second phase which reads those byte-or-Word-streams and does the actual...
Forum: Coders. Asm / Hardware 20 March 2018, 15:25
Replies: 2
Views: 353
Posted By Kalms
Sounds plausible, thanks. I will probably both...

Sounds plausible, thanks. I will probably both add BBUSY tests to my BLIT handler and disable CIA interrupts (via CRA/CRB/ICR) to be safe.
Forum: Coders. Asm / Hardware 19 March 2018, 22:03
Replies: 2
Views: 353
Posted By Kalms
Emulated A500 with Kick 1.3 generates spurious Lev6 interrupt

Hi,

I was looking into a graphical corruption the other day, and ended up at "it seems that the OS is touching blitter-related bits when it shouldn't". Perhaps someone here can shed some light?
...
Forum: Coders. Asm / Hardware 15 March 2018, 12:33
Replies: 21
Views: 2,018
Posted By Kalms
If the rotation happens before c2p, it will work...

If the rotation happens before c2p, it will work on chunky pixels. If the rotation happens afterward, it will work on individual bitplanes. If the rotation happens as part of the c2p, it... makes the...
Forum: Coders. Asm / Hardware 13 March 2018, 22:42
Replies: 21
Views: 2,018
Posted By Kalms
There is a short blurb on it at the bottom of...

There is a short blurb on it at the bottom of http://www.lysator.liu.se/~mikaelk/doc/c2ptut/ .

The gist of it is:

1. You can construct a "merge op" which exchanges bits 'diagonally' between a...
Forum: Coders. Asm / Hardware 08 March 2018, 08:14
Replies: 6
Views: 635
Posted By Kalms
It may be possible to do the 90 degree rotation...

It may be possible to do the 90 degree rotation in a separate pass, before the actual c2p conversion. If you make two versions of the game - one which draws the graphics vertically, and one which...
Forum: Coders. Asm / Hardware 07 March 2018, 22:33
Replies: 6
Views: 635
Posted By Kalms
I don't know of one myself, but, what are you...

I don't know of one myself, but, what are you going to use it for, if you did come across one? What's the purpose of the 90-degree rotation?
Forum: Coders. Asm / Hardware 14 January 2018, 14:09
Replies: 137
Views: 12,571
Posted By Kalms
@master484 How about you make proof-of-concepts...

@master484 How about you make proof-of-concepts of your ideas? If it is just a question of "what will the end result look like" and not "how quick will it run on the a500" then you don't need to...
Forum: Coders. Asm / Hardware 06 January 2018, 13:44
Replies: 137
Views: 12,571
Posted By Kalms
Hm, I realized a mistake: pixel pairs will...

Hm, I realized a mistake: pixel pairs will alternate between [texel(x,y) and texel(x,y)] and [texel(x,y) and texel(x,y+1)] when magnifying. When minifying in the scale range 0.5 ... 1.0 then the...
Forum: Coders. Asm / Hardware 06 January 2018, 09:48
Replies: 137
Views: 12,571
Posted By Kalms
After some sleep, I realized that there's no...

After some sleep, I realized that there's no benefit to scrambling pixel order. Just having one texture with data %a3a2a1a0a3a2a1a0 and another with %a3a2a1a0A3A2A1A0 (so one pixel in the high nibble...
Forum: Coders. Asm / Hardware 05 January 2018, 22:00
Replies: 137
Views: 12,571
Posted By Kalms
Neat! I like your testcase definition. I...

Neat! I like your testcase definition.

I presume you are targetting A500. If so, a couple of things:

Use mipmapping. By using mipmapping you can keep a lid on the worst-case minification that...
Forum: Coders. Asm / Hardware 01 December 2017, 13:09
Replies: 32
Views: 1,843
Posted By Kalms
Side note, I implemented a thread switcher with...

Side note, I implemented a thread switcher with the intent of supporting a small number of parallel threads ("track loading from disc", "MFM decoding", "decompression", "realtime graphics") and push...
Forum: Coders. Asm / Hardware 27 November 2017, 17:22
Replies: 32
Views: 1,843
Posted By Kalms
You also need to change the IPL bits in SR. It's...

You also need to change the IPL bits in SR. It's very fiddly, most other solutions (like moving heavy processing out of the VERTB handler) are better choices.
Forum: Coders. Asm / Hardware 17 September 2017, 14:14
Replies: 7
Views: 610
Posted By Kalms
http://eab.abime.net/showthread.php?t=72575...

http://eab.abime.net/showthread.php?t=72575 contains more in-depth discussion of chipbus activity and prioritization.
Forum: Coders. Asm / Hardware 24 August 2017, 16:53
Replies: 20
Views: 1,461
Posted By Kalms
As others have mentioned, the measurement error...

As others have mentioned, the measurement error will be large if you take single instructions. If you want less than 10% error margin then I think you will need to measure blocks that take 100+...
Forum: Coders. Asm / Hardware 24 August 2017, 13:48
Replies: 20
Views: 1,461
Posted By Kalms
You can use VHPOSR as a high-precision timer...

You can use VHPOSR as a high-precision timer source on all Amiga systems. You need to make sure that the resolution is set to something such that you know how the hardware will count (DBLPAL will...
Forum: Coders. Asm / Hardware 19 July 2017, 13:39
Replies: 172
Views: 18,096
Posted By Kalms
Thanks, appreciated. Agreed that there are things...

Thanks, appreciated. Agreed that there are things that could be done to improve performance over what Ray/TSCC built back in 2008.

However, I've checked out the video, read the last 4 pages of the...
Forum: Coders. Asm / Hardware 19 July 2017, 10:16
Replies: 172
Views: 18,096
Posted By Kalms
Do you have any links to this? I'd like to read...

Do you have any links to this? I'd like to read more about it.
Forum: Coders. Asm / Hardware 17 July 2017, 22:48
Replies: 6
Views: 587
Posted By Kalms
Let's say that you start out in user mode. In...

Let's say that you start out in user mode. In this mode, a7 will alias onto the user stack pointer register (USP), and the supervisor stack pointer register (SSP) is inaccessible to you.

You can...
Forum: Coders. Asm / Hardware 09 July 2017, 21:30
Replies: 7
Views: 683
Posted By Kalms
That is indeed wrong. That is correct....

That is indeed wrong.



That is correct. (But even if instructions are being fetched from the instruction cache, these instructions will probably perform some data reads/writes -- and all those...
Forum: Coders. Asm / Hardware 08 July 2017, 19:35
Replies: 7
Views: 683
Posted By Kalms
The magazines are misleading/incorrect, the 68020...

The magazines are misleading/incorrect, the 68020 will not be able to do more data transfer over the chipbus than the 68000. Any performance gains are from the other factors outlined in this thread.
Forum: Coders. Asm / Hardware 07 July 2017, 19:33
Replies: 7
Views: 683
Posted By Kalms
The 68000 CPU has access to only every 2nd...

The 68000 CPU has access to only every 2nd buscycle in Chip RAM and fake-Fast RAM. This is not a problem in itself since the CPU is designed to spend 4 cycles (= 2 buscycles) when performing a memory...
Forum: Coders. Asm / Hardware 07 June 2017, 17:49
Replies: 15
Views: 1,553
Posted By Kalms
Yep, but: if you 'miss' the nonexistent sync word...

Yep, but: if you 'miss' the nonexistent sync word at the start of the buffer, you will skip over 1kb or so of real data, and then the remaining 12800-1024 bytes may not contain all 11 sectors any...
Forum: Coders. Asm / Hardware 05 June 2017, 23:49
Replies: 15
Views: 1,553
Posted By Kalms
Check out...

Check out http://martin.blom.org/tmp/Amiga/hackdisk202/hackdisk.s, there is this section in there:

;This routine is trickier than it appears. The trick is that we must NOT
;assume a $4489 at the...
Forum: Coders. Asm / Hardware 28 April 2017, 02:00
Replies: 154
Views: 76,050
Posted By Kalms
Nice! You can get further still if you think in...

Nice! You can get further still if you think in terms of data parallel computation and try all different permutations of the nested loops and input data format changes that you can think of, with the...
Forum: Coders. Asm / Hardware 25 April 2017, 08:32
Replies: 154
Views: 76,050
Posted By Kalms
Not sure if this helps, but you can change the...

Not sure if this helps, but you can change the logic of the table lookup approach to 'setup code, move.l from table, neg.w table offset, sub.l from table'. If you are doing matrix operations you can...
Forum: Coders. Asm / Hardware 01 March 2017, 23:32
Replies: 11
Views: 1,640
Posted By Kalms
As far as I know there is no such pipelining...

As far as I know there is no such pipelining within the 68000. Will be interested to hear if you find out otherwise :)
Forum: Coders. Asm / Hardware 01 March 2017, 22:50
Replies: 11
Views: 1,640
Posted By Kalms
I am not 100% certain here, but I believe that...

I am not 100% certain here, but I believe that the limiting factor is the 68000 microcode itself. It is written in such a way that the 68000 will not attempt memory accesses more often than every 4th...
Forum: Coders. Asm / Hardware 22 February 2017, 09:17
Replies: 20
Views: 3,489
Posted By Kalms
By and large you are correct. It seems as though...

By and large you are correct. It seems as though you are mainly limited by CPU now (for 320x256 your blitter pass takes <0.5 frames but CPU takes >2 frames), right?

When you see operations that...
Forum: Coders. Asm / Hardware 01 September 2016, 19:40
Replies: 9
Views: 1,928
Posted By Kalms
Thanks. I've added the routine to the github...

Thanks. I've added the routine to the github repo: https://github.com/Kalmalyzer/kalms-c2p/blob/master/bitmap/c2p1x1_4_c5_bm.s
Showing results 1 to 40 of 186

 
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