English Amiga Board

English Amiga Board (http://eab.abime.net/index.php)
-   Coders. Asm / Hardware (http://eab.abime.net/forumdisplay.php?f=112)
-   -   How to disable caches using MOVEC => CACR (http://eab.abime.net/showthread.php?t=80970)

jotd 04 January 2016 23:34

How to disable caches using MOVEC => CACR

I don't remember the way to disable (not clear) the caches:

Would this work?

moveq #0,D0

hooverphonique 05 January 2016 11:56

yes, that would work..

from exec.library/CacheControl documentation:

BITDEF CACR,EnableI,0 ;Enable instruction cache
BITDEF CACR,FreezeI,1 ;Freeze instruction cache
BITDEF CACR,ClearI,3 ;Clear instruction cache
BITDEF CACR,IBE,4 ;Instruction burst enable
BITDEF CACR,EnableD,8 ;68030 Enable data cache
BITDEF CACR,FreezeD,9 ;68030 Freeze data cache
BITDEF CACR,ClearD,11 ;68030 Clear data cache
BITDEF CACR,DBE,12 ;68030 Data burst enable
BITDEF CACR,WriteAllocate,13 ;68030 Write-Allocate mode (must
;always be set)

note that flushing caches by direct register access, there are some subtleties regarding 040/060 that do not match the above.

jotd 05 January 2016 21:35

Like cpusha bc, yeah
Anyway my target is 680ec20

Ashtor 10 January 2016 08:13

You should avoid touching the CACR with own code, use the exec.library function CacheControl, that way your code will work on different CPUs.


StingRay 10 January 2016 18:23


Originally Posted by Ashtor (Post 1061646)
use the exec.library function CacheControl

CacheControl() requires at least OS2.0 so not an option if code has to run on Kick1.3 or lower machines.

idrougge 10 January 2016 18:56

You may or may not agree that it makes sense to assume at least v37 in systems with accelerators.

jotd 10 January 2016 23:21

I forgot to say: I don't have the OS handy when I wanna do this.

Wepl 22 January 2016 21:53

for the 68020/30 your code is ok :)

Hedeon 25 January 2016 15:37

Don't forget movec is privileged on 68010+

jotd 25 January 2016 22:13

Yes you have to know where the vbr is before redirecting a trap to the superuser routine.
If vbr is not zero and you dont have the value then you cannot call supervisor functions, mspecially because os is down.

roondar 07 November 2017 14:27

Sorry for the thread necromancy, but I'm wondering what the correct way to disable caches for the 68040/060 is (assuming I'm not using Exec to do so).

Are there any examples for this (I did try Google but came up more confused than enlightened)?

Wepl 07 November 2017 17:29

I would say from supervisor mode:
disable interrupts...
cpusha dc
moveq #0,d0
movec d0,cacr
movec d0,pcr # on 68060 only!

roondar 07 November 2017 21:45

Thanks a lot!

I tried to puzzle it together using the Motorola 68K Familily Reference Manual, but I just didn't know for sure and couldn't find example code so this helps a lot :)

All times are GMT +2. The time now is 20:47.

Powered by vBulletin® Version 3.8.11
Copyright ©2000 - 2019, vBulletin Solutions Inc.

Page generated in 0.04144 seconds with 11 queries